1. Field of the Invention
The present invention relates to a flash memory, and more particularly, to a method for accessing a flash memory and an associated memory device.
2. Description of the Prior Art
As flash memory technology progresses, many kinds of portable memory devices, such as memory cards respectively complying with SD/MMC, CF, MS, and XD standards, can be widely implemented in various applications. Therefore, the control of access to flash memories in these portable memory devices has become an important issue.
Please refer to FIG. 1. FIG. 1 is a diagram illustrating a memory controller writing updated data into a data block 100 of a flash memory. As shown in FIG. 1, the memory controller sequentially writes the updated data from a host device (e.g., a personal computer) into pages P1, P2, P3, P4, . . . , etc. of the data block 100. If the memory controller is disconnected from the power when writing the data into page P4, the data written into the page P4 will be incomplete. When the memory controller is re-connected to the power, the memory controller will sequentially read the data of the data block 100 from the last page Pn (at this time, the pages P5-Pn are empty). If a reading error occurs when reading the data of page P4 (the error data stored in the page P4 cannot be corrected by using its corresponding error correction code), the memory controller will determine that the power was suddenly shut down during the time the data was written into the page P4, and the data stored in page P4 will be discarded; if no reading error occurs when reading the data of the page P4 (the error data stored in the page P4 can be corrected by using its corresponding error correction code), the memory controller will determine that the data stored in the page P4 is complete and correct.
However, when the power is suddenly shut down during the process of data being written into page P4, levels of memory units of the page are unstable. That is, the aforementioned determination that “data written into page P4 will be incomplete” includes an obvious data error or a vague data error. If the page P4 has this vague data error, generally the data read from the page P4 is correct, however, in the situation that the memory controller has great power consumption (e.g., a large amount of data is written or read), the data read from the page P4 may be incorrect (i.e., data reading error). In other words, if the page P4 has the vague data error, sometimes the data read from the page P4 is correct and sometimes the data read from the page P4 is incorrect. Therefore, even if the memory controller determines that the data stored in the page P4 is complete and correct after the memory controller is re-connected with the power, a reading error may still occur when reading the data stored in page P4 at a later time, causing inconvenience and trouble to a user.